USB interface 1 is used to reprogram the onboard CPLD, allowing the BusBlaster to be reconfigured to support various kinds of hardware interfaces, including JTAG. The FTDI2232H exposes two USB interfaces to the host. The FTDI2232H handles USB communication and provides a basic JTAG interface while the reprogrammable CPLD handles signal level translation and details relating to the specific hardware interface type to be supported (in this case, a JTAGkey compatible interface). In short, BusBlaster is a JTAG interface that leverages the FTDI2232H chip and the Xilinx XC2C32A CoolRunner-II Complex Programmable Logic Device (CPLD) chip. We strongly recommend you watch the video should you choose to use one.

We found this short video provides an in-depth overview of the BusBlaster design philosophy and architecture.

Along with the BusBlaster, we used the following software to interact with the CPU: In order to verify the vulnerabilities submitted by the researchers, we used a BusBlaster v3c JTAG debugger to interact with the MIPS core in the Ralink 3052F SoC.

Belkin n300 driver usb.sys